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This goal of this document is to link the COMPLEX main results with the expected wider societal implications of the project.

The consideration of an embedded device's power consumption and its management is increasingly important nowadays. Currently, it is not easily possible to integrate power information already during the platform exploration phase. In this integrated project, integrated device manufacturers, system integrators, Electronic Design Automation (EDA) vendors and research partners collaboratively worked on solving the design challenges of today's heterogeneous HW/SW systems regarding power and complexity.

The main objective of the COMPLEX project was to increase the competitiveness of the European semiconductor, system integrator and EDA industry by addressing the problem of platform-based design space exploration (DSE) under consideration of power and performance constraints early in the design process. High performance usually causes high power consumption. A main challenge in today’s embedded system design is to find the perfect balance between performance and power. This balance cannot be found efficiently and at high quality, because until now no generic framework for accurately and jointly estimating performance and power consumption starting at the algorithmic level has been available.

As a result, we propose a reference framework and design flow concept that combines system-level power optimization techniques with platform-based rapid prototyping. Virtual executable prototypes are generated from MARTE/UML and functional C/C++ descriptions, which then allows to study different platforms, mapping alternatives, and power management strategies.

Our proposed flow combines system-level timing and power estimation techniques available in commercial tools with platform-based rapid prototyping. We propose an efficient code annotation technique for timing and power properties enabling fast host execution as well as adaptive collection of power traces. Combined with a flexible design-space exploration (DSE) approach our flow allows a trade-off analysis between different platforms, mapping alternatives, and optimization techniques, based on domain-specific workload scenarios.

This deliverable presents the results from Task T3.2 - Embedded software optimization (Participants: PoliMi, IMEC - Start: M7 - End: M24) and Task T3.3 – Custom hardware optimization (Participants: CV, OFFIS, PoliTo - Start: M7 - End: M24) up to M27.

The deliverable is the second and last describing the optimization activities for embedded software and for the hardware, and describes to the application of these optimization techniques in the COMPLEX flow ‘in isolation’ without emphasis of their interaction. The latter is the subject of a different set of deliverables (D3.4,2 ”Intermediate Report on Design Space Exploration, D3.4.3, “Final Report on Design Space Exploration” for the hardware optimizations, and D3.5.2 “Final report on Run-Time Management” for the software techniques).

The document closely follows the structure of its predecessor (D3.2.1). Sections 2 and 3 of describe the methodologies and the toolchains for the embedded software and custom hardware optimization (both High Level Synthesis and Memory hierarchy optimizations). Finally, Section 4 shows how the three selected use cases are covered by the optimization toolchains.

This document is intended to present COMPLEX activities focused on education and training. In the first part of the project overall activities on education, in a broad sense encompassing mainly dedicated workshops and conferences, were undertaken by the consortium. More focused training courses, tutorials, web material and educational courses were prepared by partners in the second part of the project in addition to the general-purpose educational activities at conferences and workshops.

For more details on dissemination activities related to conferences and workshops, please refer to the COMPLEX deliverable D5.2.3.

Authors

Massimo Poncino, Haroon Mahmood (PoliTo),
Carlo Brandolese, Gianluca Palermo, William Fornaciari (PoliMi),
Fernando Herrera, Pablo Peñil, Hector Posadas (UC),
Chantal Ykman-Couvreur (IMEC)

Abstract

This deliverable reports the results of the work for the final period in Task T3.4: Design Space Exploration (Participants: PoliTo, PoliMi, UC, IMEC - Start: M7 - End: M34). With respect to the previous deliverables of this task (D3.4.1 and D3.4.2) this one is quite more compact since most of the activities concerning DSE integration and the optimization tools have already been complete and described in 3.4.2. In the last period in fact the activities of this task have been concerned with (i) some minor details of the tool integration strategies and (ii) some additional features of the individual optimization tools have been carried out.

Authors

Davide Quaglia (EDALab), Raúl Valencia Pérez (GMV),
Sara Bocchio, Alberto Rosti (ST-I, ST-PRC),
Laurent San (Thales), Luciano Lavagno (Polito),
Tesnim Abdellatif (MDS)

Abstract

This deliverable is the final report of task 4.3 dealing with evaluation of design integration/tools. Task 4.3 is coordinated by ST-I and involves mainly tool evaluators (GMV, ST-I, ST-PRC, Thales, PoliTo) with the support of tool providers (MDS, OFFIS, EDALab, UC, PoliMi, PoliTo, SNPS, and IMEC). The objective of the task 4.3 is to evaluate the methodologies developed in WP2 and WP3 and integrated into a unique design flow in WP1. This task focuses on the global COMPLEX flow which is the objective of task 4.3 (starting at M27), in particular with an estimation of the improvement that COMPLEX flow brings compared to current design practices.

This document summarizes all dissemination and standardization activities that were undertaken by the COMPLEX project consortium as a whole and by each individual partner of the consortium in the whole duration of the project execution. It describes all dissemination activities of the COMPLEX project including activities that were oriented to promote the project, educate on the project achievements and the new scientific and industrial context of the project development.

In the last period of COMPLEX, the consortium intensified efforts to largely present project results to the entire community. Several activities like the tutorial presentation at DATE or the COMPLEX-centric workshop at Embedded World conference were presenting achievements of COMPLEX in a complete and comprehensive way, and their organization was possible only in the final stage of the project, with the effort of the whole consortium.

The deliverable on training activities D5.1.2 presents in detail the educational activities of the project, that are aiming at educating the whole community (understood as industrial and scientific community) on the technical, scientific and practical outcomes of the project and focuses on presentations, tutorials and demonstrations. Certainly, there are several activities like organization of conferences and workshops that can be understood as both education/training activities and larger dissemination activities. Thus, the clear separation of the content of the two deliverables was not always possible. The editors of the deliverables took the position that each of the documents is independent and self-contained and can be read separately from the other. This explains a certain overlap between the two deliverables.

This deliverable is the third report of Task 3.5, dealing with Run-time Resource Management (RRM). This task is coordinated by IMEC and also involves POLIMI and OFFIS. It started at month M7 and it ends at month M30.

The goals of Task 3.5 are to develop a lightweight architecture for RRM in tightly constrained systems and sample run-time resource managers for both COMPLEX use cases 1 and 2. In addition to the RRM architecture, Task 3.5 also develops services and optimization heuristics to be supported by the RRM for alleviating the burden of the application programmer.

The goals of the public version of this third deliverable D3.5.3 are to describe the entire work performed in Task T3.5, including the release of the RRM prototypes and the description of experiments performed to analyze the efficiency of the RRM implementation for both COMPLEX use cases.

 

Authors

Bart Vanthournout (SNPS); Davide Quaglia (EDALab); Philipp A. Hartmann (OFFIS);
Carlo Brandolese, Gianluca Palermo, William Fornaciari (PoliMi);
Héctor Posadas, Fernando Herrera (UC); Chantal Ykman Couvreur (IMEC)

Abstract

Deliverable D3.1.2 is aimed at providing a description of the work executed in Task 3.1 related to the development of a proper system simulation and application profiling environment. This document is mostly based on D3.1.1, the “Preliminary report on system
simulation and profiling” and gives an updated, but self-contained overview of the results in T3.1. It is the final report on the system simulation and profiling tools that have been developed and are integrated into the COMPLEX framework in T1.3 and T1.4, respectively.

The purpose of Task 3.1 is to enhance the virtual platform simulations from WP2, which are generated from Task 2.5, with analysis and profiling tools so that a design space exploration loop can be enabled. The analysis and profiling metrics that need to be implemented are derived from T1.1 as well as from T1.2. These metrics are to be used to drive the performance optimizations for the system components via the cost functions defined in T1.2.3.

This deliverable presents the results from Task T3.2 - Embedded software optimization (Participants: PoliMi, IMEC - Start: M7 - End: M24) and Task T3.3 – Custom hardware optimization (Participants: CV, OFFIS, PoliTo - Start: M7 - End: M24) up to M27.

The deliverable is the second and last describing the optimization activities for embedded software and for the hardware, and describes to the application of these optimization techniques in the COMPLEX flow ‘in isolation’ without emphasis of their interaction. The latter is the subject of a different set of deliverables (D3.4, ”Intermediate and Final Report on Design Space Exploration D3.4.3, “Final Report on Design Space Exploration” for the hardware optimizations, and D3.5.2 “Final report on Run-Time Management” for the software techniques).

The document closely follows the structure of its predecessor (D3.2.1). Sections 2 and 3 of describe the methodologies and the toolchains for the embedded software and custom hardware optimization (both High Level Synthesis and Memory hierarchy optimizations). Finally, Section 4 shows how the three selected use cases are covered by the optimization toolchains.

This deliverable is a public overview of the work done in work package WP1 Requirements, specification and integration to holistic design environment (Start: M1 - End: M40), with a specific focus on the design space exploration aspects of the design flow.

This deliverable documents the COMPLEX design approach. It gives an overview of the holistic platform based design space exploration flow with industrial and academic case-studies to cover the entire flow.

The COMPLEX flow follows a platform based design approach where the functionality and architecture view of the system are separated.

The first goal of this deliverable is to provide an overview of the COMPLEX design flow and to describe main interfaces in the COMPLEX design flow which enable interoperability among all involved partners. As described in the DoW these requirements are focused on:

“Application” and stimuli description: Defines the functional view of the system including the definition of the initial, functional and non-functional specification methodology using MARTE. Matlab/Stateflow is also required as an additional system modelling input incorporating dynamic system behaviour.

Platform description: Defines the architectural view of the system. It includes the definition of the MARTE HW resource modelling methodology supporting the specification of the execution platform. From this initial architectural specification, the corresponding IP-XACT description will be generated.

Model generation and cost-function definition: Define the step needed for build the system model starting from the application and platform description. Models generation and cost function definition should take care of the design space exploration feedback loop that can be done automatically or manually by the designer.

Tool interface identification: Identification of the required tool interfaces for a shared methodology for granting the interoperability of the different EDA and the design process work-flow. The tool interface identification should be done taking into account the specific needs of each COMPLEX use case defined in D1.1.1 - Definition of requirements, industrial use-cases and evaluation strategy.

The document structure is mainly composed by three parts: The first-one describes the COMPLEX design flow presenting each step in terms of goals and requirements (see Chapter 2), the second-one presents an overview of the tools as they are used for application and platform definition and generation (see Chapter 3), while the third-one gives a brief overview of the case studies done during the project and how they cover the overall design flow (see Chapter 4).

This deliverable is the second report of Task 3.5, dealing with Run-time Resource Management (RRM). This task is coordinated by IMEC and also involves POLIMI and OFFIS. It started at month M7 and it will end at month M34.

The goals of Task 3.5 are to develop a lightweight architecture for RRM in tightly constrained systems and sample run-time resource managers for both COMPLEX use cases 1 and 2. In addition to the RRM architecture, Task 3.5 will also develop services and optimization heuristics to be supported by the RRM for alleviating the burden of the application programmer.

The goals of the first deliverable D3.5.1 were to provide a preliminary vision of a generic and structured architecture for the RRM and to introduce both sample RRMs for COMPLEX use cases 1 and 2 respectively.

The goals of this second deliverable D3.5.2 are to provide an updated vision of this RRM architecture and to present the status of the RRM implementation for both COMPLEX use cases. Also for the sake of clarity, to give an overall picture of the RRM developed in COMPLEX, and to make this deliverable standalone, all RRM features resulting from work performed in Tasks T1.3, T3.1, T3.4, and T4.1 are unified in this deliverable. Links to these tasks are also explicitly mentioned in the corresponding sections  of this deliverable.

The work of this deliverable combines the results from T2.2, T2.3, and T2.4. The goal of this deliverable is to allow the generation of an executable, multi-level, self-simulating system description, predicting the system behaviour under the use-case defined workload models with up-to cycle and/or instruction accuracy.

Based on this work, a Virtual System Generator has been developed able to read the timing and power instrumented C/C++ code for SW and user-defined HW components, which is the output of the tools developed in T2.2 and T2.4. From T2.3 it obtains virtual component implementations of memories, interconnection and pre-designed dedicated HW components.

The result is a unified simulation and performance analysis framework.

The virtual platform simulations issued from T2.5 (in combination with T2.2) are enhanced in T3.1 with analysis and profiling tools so that a design space exploration loop becomes feasible: the result of the Virtual System simulation is system timing and a power over time chart broken down into individual HW and SW tasks. Additional information, such as memory footprint and HW complexity will be provided also.

This document summarises all dissemination and standardisation activities that were undertaken by the COMPLEX project consortium as a whole and by each individual partner of the consortium in the first phases of the project execution (see also the publications section on the website).

This deliverable is the final result from Task T2.4 – Custom Hardware (Start: M4 - End: M24) where the participants under the leadership of OFFIS are UC, and OFFIS.

This deliverable documents the custom hardware estimation and model generation of the COMPLEX design approach. It describes the input required by the hardware estimation part as well as the required input stimuli. It also describes the HW/SW task separation and the hardware estimation and model generation. Model generation is tightly coupled with D2.2.2 and D2.3.2 that describe the model generation for software and IP components, respectively. For more details see COMPLEX Description of Work [1].

The purpose of D2.4.2 is to provide an estimation technique for full-custom hardware components or white-box-IP, where a functional description of the particular HW module is available. As will be shown in this document, the proposed approach is two-fold.

This document presents the overall approach to software modelling and estimation and the way the models can be aggregated into a system-level virtual platform simulation engine.

The core portion of the document describes the three models and toolchains that constitute the software part of the COMPLEX flow, namely:

  1. System-level modelling and estimation.
  2. Detailed modelling and estimation.
  3. Task-based virtual platform simulation.

Each section presents an introduction to the methodology and a summary of previous works, followed by a description of the proposed methodology and an overview of the toolchain supporting it.

This deliverable is the final result from Task T2.3 – Platform IP components (Start: M4-End: M24) where the participants are ST-I, ST-PRC, Thales, OFFIS, Synopsys, EDALab. In this task, the definition and implementation/integration of platform IP component models for memories, communication resources (buses, point-to-point connections, or networks-onchip), and dedicated hardware accelerators is performed.

In this document the concepts for the integration of pre-existing platform IP components into the overall COMPLEX design and estimation flow are presented. This covers both, the consideration of interconnect as well as computation and memory nodes in the system. Since not all the IP components might be available as a fully known, source-level, white-box model, different approaches for the integration of power estimation techniques into the virtual system model have to be used. The different estimation approaches are therefore based on so-called power-state machines. Power state machine can enable an external augmentation of power information to existing functional models, without modifying the internal behaviour of the block.

This document is intended to present COMPLEX activities focused on education and training. In the first part of the project overall activities on education in a broad sense, encompassing mainly dedicated workshops and conferences, were undertaken by the consortium, more focused training courses will be prepared by partners in the second part of the project in the addition to the planned conferences and workshops.

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Successful final review meeting
On Thursday, May 25th, the final COMPLEX review meeting has been held in Brussels.

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Final public deliverables uploaded

All public COMPLEX deliverables are now available in the Deliverables section.

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COMPLEX @ ISCUG'2013 conference
14-15 April, 2013 - Noida, India

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