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NameD2.5.3 Final report and tools on virtual system generation
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The work of this deliverable combines the results from T2.2, T2.3, and T2.4. The goal of this deliverable is to allow the generation of an executable, multi-level, self-simulating system description, predicting the system behaviour under the use-case defined workload models with up-to cycle and/or instruction accuracy.

Based on this work, a Virtual System Generator has been developed able to read the timing and power instrumented C/C++ code for SW and user-defined HW components, which is the output of the tools developed in T2.2 and T2.4. From T2.3 it obtains virtual component implementations of memories, interconnection and pre-designed dedicated HW components.

The result is a unified simulation and performance analysis framework.

The virtual platform simulations issued from T2.5 (in combination with T2.2) are enhanced in T3.1 with analysis and profiling tools so that a design space exploration loop becomes feasible: the result of the Virtual System simulation is system timing and a power over time chart broken down into individual HW and SW tasks. Additional information, such as memory footprint and HW complexity will be provided also.

FilenameCOMPLEX_D2.5.3_Final_report_and_tools_on_virtual_system_generation-public.pdf
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Created On: 05/10/2013 13:11
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Successful final review meeting
On Thursday, May 25th, the final COMPLEX review meeting has been held in Brussels.

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Final public deliverables uploaded

All public COMPLEX deliverables are now available in the Deliverables section.

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COMPLEX @ ISCUG'2013 conference
14-15 April, 2013 - Noida, India

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