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COMPLEX @ ISCUG'2013 conference
14-15 April, 2013 - Noida, India

About the conference

The Indian SystemC User Group (ISCUG) organization aims to accelerate the adoption of SystemC as the open source standard for ESL design. The annual ISCUG conference provides a platform for the SystemC beginners, the SystemC experts, ESL managers and the ESL vendors to share their knowledge, experiences & best practices about SystemC usage. The event is also useful for the following target audience:

  • Electronics Systems developers who want to explore SystemC based ESL methodologies
  • System on Chip (SoC) Architects: Working on architectural exploration for power & performance optimization
  • Embedded software developers who want to use Virtual Platforms
  • Chip design engineers who want to explore SystemC based chip design at the abstraction above RTL
  • Chip verification engineers who want to explore SystemC based verification methodologies

Tutorial presentation

Leveraging Non-Intrusive TLM-2.0 Transaction Introspection for Power-Aware Virtual Prototyping (slides)
Philipp A. Hartmann (OFFIS)

Integrating third-party TLM-2.0 components into custom system models frequently requires the definition of wrappers to adapt the particular behaviour and analysis/tracing capabilities of such a component to the concrete needs of the overall platform. In this tutorial, a simple yet powerful mechanism for introspection and augmentation is presented, greatly reducing the amount of required boiler-plate code in such cases. Custom convenience sockets for transaction introspection and forwarding are introduced and required implementation techniques are discussed. In the second part, this augmentation mechanism is used to externally add power information in terms of a state-machine based abstraction to a pre-existing TLM-2.0 system.

Keynote presentation

Beyond algorithms and performance: Modelling extra-functional properties in SystemC (slides)
Philipp A. Hartmann (OFFIS)

SystemC and TLM-2.0 based ESL methodologies are widely used for early application, platform, and performance analysis already. But the consideration of an embedded device's power consumption and its management is increasingly important nowadays, not only for mobile devices. Currently, it is not equally easily possible to integrate such extra-functional information at electronic system-level.
In this talk, the design challenges of today's heterogeneous HW/SW systems regarding power and complexity, both for platform vendors as well as system integrators are discussed. Existing and new approaches for system-level timing and power estimation techniques, as well as their efficient integration into SystemC/TLM virtual prototypes are presented. To enable interoperability beyond timing and functionality, the need for future standardization efforts in the area of extra-functional properties is motivated.



Last Updated ( Monday, 29 April 2013 13:06 )  


Successful final review meeting
On Thursday, May 25th, the final COMPLEX review meeting has been held in Brussels.


Final public deliverables uploaded

All public COMPLEX deliverables are now available in the Deliverables section.


COMPLEX @ ISCUG'2013 conference
14-15 April, 2013 - Noida, India


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