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DATE’12 Friday Workshop: QVVP’12

Call for Posters

DATE’12 Friday Workshop
16 March, 2012 – Dresden, Germany

Quo Vadis, Virtual Platforms?
Challenges and Solutions for Today and Tomorrow (QVVP’12)



Rainer Leupers – RWTH Aachen University, DE
Christian Haubelt – University Rostock, DE
Achim Rettberg – Carl von Ossietzky University Oldenburg, DE
Kim Grüttner – OFFIS – Institute for Information Technology, DE


Nowadays, the deployment of Virtual Platform models is an industry-proven technique in a wide variety of design tasks from pre-silicon software development to performance analysis and exploration. With the increasing complexity, both in terms of the applications and the target platforms (e.g. increasing number of cores, more complex memory hierarchies), the Virtual Platform per se is not an answer to all of today’s design challenges. But by adding further abstraction to the models, an increasing need for automated mapping, refinement, and model transformations is needed. Formal, static, and dynamic analysis methods are increasingly dependent on platform details, requiring traceability during all design phases.

This workshop aims to bring together developers, researchers, and managers from industry and academia to develop a perspective for the future use of Virtual Platforms by exchanging knowledge about current and future requirements and their possible solutions. The workshop will also provide some space for the provision of state of the art and tangible results and session on tool demos.


Questions to be addressed during the workshop are:

  • How to efficiently generate a Virtual Platform for new applications and HW platforms?
  • How to close the implementation/refinement gap?
  • Which properties of a real system can be captured?
  • What are the requirements for future Virtual Platforms?
  • How can Virtual Platforms support the development of future real-time applications for MPSoCs?

In this workshop, different points of view will be discussed by

  • users of Virtual Platforms from different domains
  • tool vendors already offering Virtual Platform tools and modeling techniques, and
  • academic research institutes from around the world showing recent progress in Virtual Platform synthesis and core technologies.

Workshop Format and Structure

The workshop presentations will be by invitation, an open call will be issued for poster session presentations. Poster submissions for each topic area will be reviewed by the workshop organizers and the speakers respectively.

Topic Areas

The workshop will have three main sessions:

  1. System Synthesis – From System-Level Models to (Virtual) Platforms
  2. Virtual Platforms Techniques – State of the Art and Beyond
  3. Implementing Virtual Platforms on Multi-Application Multi-Core Platforms

After each workshop session will be a combined 30-60 min coffee and poster break.




Welcome and Introduction

Rainer Leupers – RWTH Aachen University, DE

SESSION 1: System Synthesis – From System-Level Models to (Virtual) Platforms

Moderator: Achim Rettberg – Carl von Ossietzky University Oldenburg, DE

On today’s Virtual Platforms, the communication is expressed at the transaction-level, usually on top of memory-mapped interconnect models. The mapping and refinement of system-level application models to such platforms is still a challenging task. Exploiting the properties of stricter models of computation (MoC) during this mapping requires knowledge of certain platform artifacts, which may or may not be fixed beforehand.


Recoding Embedded Applications into Flexible System-Level Models

Rainer Dömer – University of California, Irvine, US


Actor-Based Virtual Prototype Generation

Jürgen Teich – University of Erlangen-Nuremberg, DE


MPSoC Platforms for mobile devices: HW and SW development based on the Nucleus methodology

Torsten Kempf – RWTH Aachen University, DE


Poster Session & coffee break

(for list of posters see below)

SESSION 2: Virtual Platform Techniques – State of the Art and Beyond

Moderator: Kim Grüttner – OFFIS – Institute for Information Technology, DE

With SystemC TLM-2.0, an industrial standard for modeling interoperable Virtual Platforms has been defined. Still, for the platform integration as well as for the analysis of functional and non-functional properties (like power, temperature, etc) different, mainly unconnected approaches exist. In this session, the industrial state-of-the-art for rich Virtual Platform models as well as recent research results and standardization activities are presented.


Scalable Transaction Level Modeling Methodology for Function, Communication, Timing and Power

Yossi Veller – Mentor Graphics, IL


Task Modeling and HW/SW partitioning for System Performance Optimization

Tim Kogel – Synopsys, DE




HW/SW Verification from an Open SystemC virtual prototype through simulation, emulation, and FPGA prototyping

Markus Winterholer – Cadence, US


High-Level Synthesis, TLM Power State Machines, and advanced tracing for Virtual Platforms

Philipp A. Hartmann – OFFIS – Institute for Information Technology, DE

SESSION 3: Implementing Virtual Platforms on Multi Application Multi-Core Platforms

Moderator: Christian Haubelt – University of Rostock, DE

Mapping multiple concurrent applications to multi-core platforms under (hard) real-time constraints is a very challenging task. Multi-core WCET analysis strongly depends on platform details. To achieve composability and segregation of heterogeneous applications running on a single platform, even further (performance, power, etc.) virtualization may be needed. Dedicated platforms providing hardware support for analyzability may be the answer.


Computation Architecture and Platform for Smart Grid Applications
Moritz Neukirchner – TU Braunschweig, DE


Poster Session & coffee break

(for list of posters see below)


CoMPSoC: A Composable and Predictable Execution Platform

Kees Goossens – Eindhoven University of Technology (TU/e), NL


Cross-Domain Reference Architecture for Embedded Systems

Roman Obermaisser – University of Siegen, DE


Closing Remarks
Christian Haubelt – University of Rostock, DE





Virtual Platform Generation Using TECS Software Component and SCE
Takuya Azumi - Ritsumeikan University, JP
Yuko Hara-Azumi - Ritsumeikan University, JP
Rainer Dömer - University of California, Irvine, US

Architecture Exploration of Multicore Systems-on-Chip using a TLM-based Framework
Mona Safar - Ain Shams University, ET
Magdy El-Moursy - Mentor Graphics Corporation, ET
Mohamed Abdelsalam - Mentor Graphics Corporation, ET
Ashraf Salem - Technology Innovation and Entrepreneurship Center (TIEC), ET

Virtual Platform for Mixed-Time Criticality Applications: The CoMPSoC Architecture and SDF3 Design Flow
Benny Akesson - Eindhoven University of Technology, NL
Sander Stuijk - Eindhoven University of Technology, NL
Anca Molnos - Delft University of Technology, NL
Martjin Koedam - Eindhoven University of Technology, NL
Radu Stefan - Eindhoven University of Technology, NL
Andrew Nelson - Delft University of Technology, NL
Ashkan Beyranvand - Delft University of Technology, NL
Kees Goossens - Eindhoven University of Technology, NL

Source-Level Timing Simulation of Embedded Software Considering Compiler Optimizations
Stefan Stattelmann - FZI Forschungszentrum Informatik, DE
Oliver Bringmann - FZI Forschungszentrum Informatik, DE
Wolfgang Rosenstiel - University of Tuebingen, DE

Efficient Analysis of SystemC Models
Simon Roth, BOSCH GmbH, DE
Wolfgang Rosenstiel - University of Tuebingen, DE

Virtual Platform for Embedded System Power Estimation
Santhosh Kumar Rethinagiri - INRIA Lille Nord Europe, Univ. of Valenciennes, FR
Rabie Benatitallah - UVHC/LAMIH, FR
Jean-Luc Dekeyser - Inria, FR

Domain Specific Virtual Platforms
Francisco Mendoza - FZI Forschungszentrum Informatik, DE
Juergen Becker - Karlsruhe Institute of Technology, DE

Dynamic Resource Management for Virtualized Mixed-Criticality Systems
Stefan Groesbrink - University of Paderborn, DE
Simon Oberthuer - University of Paderborn, DE
Daniel Baldin - University of Paderborn, DE

Quo Vadis, Virtual Platforms? A Posse ad Esse, hic Platforma Vitutis Est!
Graham Hellestrand - Embedded Systems Technology, Inc., US

Scalable Multi-Core Virtualization for Embedded System-on-Chip Architectures
Alexander Biedermann - TU Darmstadt, DE
Sorin Huss - TU Darmstadt, DE

SystemC-Based Emulation of Hardware Platforms in a Physical Environment
Ralph Görgen - OFFIS Institute for Information Technology, DE
Florian Voit - Siemens AG, DE
Achim Rettberg - Carl von Ossietzky University Oldenburg, DE

Poster Submission Instructions

Authors are invited to submit contributions as up to 2-page long abstracts. On-going works are welcome. All submissions must be written in English, and only PDF files are accepted. All 2-pages abstract must be prepared in accordance with the DATE manuscript style. All submitted 2-page abstracts should clearly identify the relevant session (System Synthesis, Virtual Platforms Techniques, or Implementing Virtual Platforms on Multi-Application Multi-Core Platforms) and will undergo the same review process (at least 2 reviews per contribution).

Link to Call for Posters (pdf)

Link to submission system: https://www.easychair.org/conferences/?conf=qvvp12


A workshop digest based upon the 2-page abstract and one-page poster will be distributed to all participants of the workshop. In addition to the workshop digest, the organizers plan to invite selected speaker and poster presenters to submit original work to a Springer Book on “Virtual Platforms for MPSoC Design: Principles & Practice”.

Note that the posters presented at the DATE workshops are NOT disseminated through the official DATE proceedings or through any other formal channels, such as, for example, the IEEExplore or the ACM Digital Library.

Workshop digest can be downloaded here

Presentation slides and participant list can be downloaded here (only for registered workshop participants)

Program Committee

Rainer Dömer (USA)
Leonard Drucker (USA)
Rolf Ernst (DE)
Kees Goossens (NL)
Kim Grüttner (DE)
Philipp A. Hartmann (DE)
Christian Haubelt (DE)
Tim Kogel (DE)
Rainer Leupers (DE)
Adam Morawiec (FR)
Moritz Neukirchner (DE)
Roman Obermaisser (DE)
Achim Rettberg (DE)
Jürgen Teich (DE)
Yossi Veller (IL)

Last Updated ( Tuesday, 10 July 2012 15:15 )  


Successful final review meeting
On Thursday, May 25th, the final COMPLEX review meeting has been held in Brussels.


Final public deliverables uploaded

All public COMPLEX deliverables are now available in the Deliverables section.


COMPLEX @ ISCUG'2013 conference
14-15 April, 2013 - Noida, India


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